layiq

/la·yiq/adjective

worthy; deserving; fitting; suitable.

A role, opportunity, or path that merits attention, time, and pursuit.

SI/PI Engineer at Etched | LAYIQ

Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet.
Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers.
Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements.
Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation.
Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave.
Collaborate with PCB design and layout engineers, and ASIC teams to define and review design guidelines early in the product lifecycle.
Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions.
Develop and maintain simulation-to-hardware correlation databases to continuously improve modelling accuracy.
You may be a good fit if you have (Must-have qualifications)
B.S. or M.S. in Electrical Engineering or a closely related discipline.
5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps serial links or DDR4/5 and HBM3/4 memory interfaces).
Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS, or equivalent).
Strong understanding of transmission line theory, return-loss, insertion-loss, crosstalk, eye-diagram analysis, and jitter decomposition.
Experience with PDN modelling, target impedance methodology, and DC IR analysis.
Working knowledge of multi-layer PCB stack-up design and controlled-impedance trace routing.
Hands-on lab skills: S-parameter measurements with VNA, time-domain reflectometry (TDR), BERT operation, and oscilloscope probing techniques
Strong candidates may also have experience with (Nice-to-have qualifications)
Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.
Experience scripting automated SI/PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.

SI/PI Engineer

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