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AMD
Santa Clara, California
Source: AMD careers · View original posting
From AMD's posting. “We” and “our” refer to the employer.
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
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We are seeking a lead Physical Design Engineer to ensure that CPU Cores and SOC meet Thermal requirements and Silicon Performance. This is a technical role focusing on Physical design methodology requirements for power and thermals across IPs.
You will be a proven technical leader with the ability to drive cross-functional alignment and execution across architecture, physical design implementation, package modeling teams, ensuring timely closure and multi-dimensional alignment of power, thermal management and performance constraints. You will also be highly organized and execution-driven, with demonstrated success owning end-to-end technical workstreams and driving closure of open issues, risks, and dependencies across program milestones.
K
Drive development and alignment of thermal modeling methodology, collaborating with Package modeling teams across AMD products.
Drive new design and analysis methodologies to improve product thermal profile.
Translate product usage model, workload, and package requirements into IP performance, power, and thermal constraints and align with product performance-power models.
Drive thermal product requirements cross-function, managing critical deliverables at key project milestones.
P
Strong Physical Design background with extensive EDA tool experience.
Excellent knowledge of physical design power and performance metrics, and experience in high-performance SoC/IP design.
Familiarity with package models and advance packaging designs.
Familiarity collaborating with pre‑silicon design and package modeling teams and aligning architecture assumptions/targets with projections.
Expertise in scripting and flow automation.
Bachelors or
Masters degree in computer engineering/Electrical Engineering
Santa Clara, CA, or other AMD offices (Austin, Fort Collins, Boxborough)
We are seeking a lead Physical Design Engineer to ensure that CPU Cores and SOC meet Thermal requirements and Silicon Performance. This is a technical role focusing on Physical design methodology requirements for power and thermals across IPs.
You will be a proven technical leader with the ability to drive cross-functional alignment and execution across architecture, physical design implementation, package modeling teams, ensuring timely closure and multi-dimensional alignment of power, thermal management and performance constraints. You will also be highly organized and execution-driven, with demonstrated success owning end-to-end technical workstreams and driving closure of open issues, risks, and dependencies across program milestones.
K
Drive development and alignment of thermal modeling methodology, collaborating with Package modeling teams across AMD products.
Drive new design and analysis methodologies to improve product thermal profile.
Translate product usage model, workload, and package requirements into IP performance, power, and thermal constraints and align with product performance-power models.
Drive thermal product requirements cross-function, managing critical deliverables at key project milestones.
P
Strong Physical Design background with extensive EDA tool experience.
Excellent knowledge of physical design power and performance metrics, and experience in high-performance SoC/IP design.
Familiarity with package models and advance packaging designs.
Familiarity collaborating with pre‑silicon design and package modeling teams and aligning architecture assumptions/targets with projections.
Expertise in scripting and flow automation.
Bachelors or
Masters degree in computer engineering/Electrical Engineering
Santa Clara, CA, or other AMD offices (Austin, Fort Collins, Boxborough)
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