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AMD
San Jose, California
Source: AMD careers · View original posting
From AMD's posting. “We” and “our” refer to the employer.
As a Design Verification Engineer Lead in the AECG Group, you will help bring to life cutting-edge FPGA and ASIC solutions for a broad range of customers. As a member of the front-end design and integration team, you will collaborate closely with architecture, IP design, physical design, firmware, and product engineering teams to deliver first-pass silicon success for next-generation PCIe and CXL-based IP solutions.
You are passionate about complex IP architectures, digital design, and advanced verification methodologies. You thrive in a collaborative environment, enjoy solving challenging technical problems, and have a proven ability to work effectively across global teams. You bring strong analytical skills, technical leadership, and a continuous learning mindset.
As a Design Verification Engineer Lead in the AECG Group, you will help bring to life cutting-edge FPGA and ASIC solutions for a broad range of customers. As a member of the front-end design and integration team, you will collaborate closely with architecture, IP design, physical design, firmware, and product engineering teams to deliver first-pass silicon success for next-generation PCIe and CXL-based IP solutions.
You are passionate about complex IP architectures, digital design, and advanced verification methodologies. You thrive in a collaborative environment, enjoy solving challenging technical problems, and have a proven ability to work effectively across global teams. You bring strong analytical skills, technical leadership, and a continuous learning mindset.
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