layiq

/la·yiq/adjective

worthy; deserving; fitting; suitable.

A role, opportunity, or path that merits attention, time, and pursuit.

ASIC / FPGA Digital Design Engineer – (Lead or Senior) at The Boeing Company | LAYIQ

FPGA implementation including constraints and timing closure
Static timing analysis experience
Verification collaboration experience
High-speed interfaces, processor integration, memory subsystems, or SoC integration
Mentoring or technical leadership exposure
Familiarity with industry-standard tools and methodologies
Conflict of Interest: Successful candidate for this job must satisfy the Company’s Conflict of Interest (COI) assessment process.
Typical Education/Experience: Lead, Level 4: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Senior (Level 5): Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Relocation: This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates.
Drug Free Workplace: Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies .
Shift Work: This position is for 1st shift.

ASIC / FPGA Digital Design Engineer – (Lead or Senior)

Employer job description

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Requirements development and traceability experience

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Equal opportunity and accommodations

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