From Amazon's posting. “We” and “our” refer to the employer.
Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create?
As an ASIC Design Manager, you will be part of an advanced development team that is creating the semiconductors which will power millions of new Amazon devices. You will lead a team designing SoC ASICs and the intellectual property functions going into them. You will work closely with multi-disciplinary groups including Verification, Physical Design, DFT, and Emulation teams to build these leading-edge devices.
Key job responsibilities
Lead and manage a team of ASIC design engineers, providing technical guidance, mentorship, and career development
Own the front-end ASIC design process including micro-architecture, RTL design, IP selection, IP creation, synthesis, timing constraints, power intent, and documentation
Work closely with verification, physical design, DFT, and emulation teams to carry your team's design through to implementation.
Define and execute project plans, managing schedules, resources, and risk to deliver silicon on time and within budget
Drive design quality through robust methodologies, design reviews, and best practices
Contribute to chip architecture decisions and micro-architecture trade-offs
Recruit, hire, and retain top engineering talent
Basic Qualifications
Bachelor's degree in electrical engineering, computer engineering, or equivalent
10+ years of overall experience in ASIC/SoC development
3+ years of management or technical leadership experience, including planning and cross-team execution
Strong expertise in the ASIC design flow, including microarchitecture development, RTL design, IP creation and integration, constraints development, synthesis, timing analysis, power analysis, and ECO flows.
Ability to collaborate cross-functionally with architecture, verification, physical design, DFT, software, and vendor teams
Deep understanding of hardware design engineering disciplines, methodologies, and EDA tools
Proficiency in SystemVerilog/Verilog for RTL design
Preferred Qualifications
Master's degree or above in computer science, electrical engineering, or related field
Familiarity with standard interfaces and protocols (e.g., PCIe, Ethernet, USB, AMBA/AXI)
Equal Opportunity
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location.
Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, ID, Boise - 208,000.00 - 280,800.00 USD annually
About this listing
LAYIQ is an independent job-discovery service. This listing does not imply a partnership with or endorsement by the employer. Review the original posting for current details and availability.
