Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Understand details of High-Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory Controller Sub Systems, USB, PLL, power-up, Secured Boot schemes. Create coverage driven verification plans from specifications, review and refine to achieve coverage targets.

Create IP level module and sub-system verification plan, TB, portable test benches, sequences, and test infrastructure. Architect highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites to SOC level, achieve targeted coverage, working with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design. Work closely with DV methodology architects to improve verification flow. 40 hours/week.