Principal Memory Sub-System Validation Lead

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THE ROLE:

The Data Center Graphics and Accelerated Computing Validation Team is looking for a dynamic and energetic lead to join our growing post-silicon validation team. The Memory sub-system validation lead is responsible to drive and deliver pre- and post-silicon validation and characterization of on-die High-Bandwidth Memory (HBM) on AMD’s Datacenter GPU (Machine Instinct product).

High Bandwidth Memory sub-system is at heart of complex technology that delivers industry leading Datacenter solutions for Machine Learning (ML), and High-Performance Computing (HPC). In this wide-ranging role, validation lead is the critical interface between DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams to ensure that advanced memory technologies are delivered from architecture to mass production to AMD’s quality and industry standards.