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Apple
Austin, Texas
Source: Apple careers · View original posting
From Apple's posting. “We” and “our” refer to the employer.
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
Description
APPLE INC has the following available in Austin, Texas. Ensure that all pre-silicon deliveries of custom IPs for Apple Socs are bug free. This involves working closely with circuit and RTL (Register Transfer Level) designers to validate design functionality, optimize performance, and ensure that the design complies with the architectural specifications.
Review design and architectural specifications to understand use cases and corner conditions, then translate these into testbenches, including key verification components such as stimulus generation, checkers, assertions, and functional coverage, utilizing SystemVerilog and UVM (Universal Verification Methodology) which offers a more standardized and scalable verification approach. Ensure that the RTL/Verilog design files are bug free and match the specifications and requirements.
Run and debug simulation regressions, triage failures, track bugs, and perform detailed coverage analysis to ensure high-quality verification results. Generate and analyze Toggle Coverage reports to verify complete signal toggling for each design. Leverage industry-standard tools such as Verdi and Cadence lndago for debugging simulation-waveforms, analyzing environment hierarchies, and bug resolution in complex verification environments.
Develop and use Perl and Python-based automation scripts for automatic testbench generation and verification workflows, improving efficiency and reducing manual effort. Work with circuits pertaining to SRAMs, register files, and caches, applying academic knowledge in VLSI and circuit design to verify custom memory architectures. Refactor testbench code to enhance reusability and maintainability, eliminating hardcoded values and ensuring a modular verification environment.
Use version control systems such as Perforce, documentation platforms like Confluence, and proprietary task management tools for effective cross-functional collaboration. 40 hours/week.
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