Responsibilities
THE ROLE:
The AMD SCIO (SerDes, Communication, I/O and Optical) team is seeking a versatile SerDes Engineer to drive the applications, firmware, and validation of our next-generation high-speed serial interface IP across both electrical and optical domains.
In this role you will bridge SerDes IP design teams and SoC/system integrators, develop the low-level firmware that controls high-speed electrical SerDes and silicon photonics, and architect the characterization and validation solutions that take PCIe, Ethernet, and optical links from first silicon through volume production.
You will collaborate closely with Product Development Groups, Silicon Design, DFT, Packaging, firmware, SI/PI, and key technology partners to ensure best practices and new test concepts are architected, developed, and driven throughout the organization.
THE PERSON:
You are a self-motivated engineer with strong system intuition and a hands-on mindset, equally comfortable working close to hardware and collaborating across firmware, electrical, and optical disciplines. You thrive in fast-paced, technically challenging environments, excel in teamwork, and possess strong communication skills.
You are skilled in optimizing SerDes performance and capable of identifying and addressing issues within a collaborative team environment, working independently as well as alongside engineers across AMD design, verification, and validation teams.
KEY RESPONSIBILITIES:
- Involve in first-silicon bring-up of SerDes PHYs across PCIe and Ethernet protocols, and serve as the technical escalation point for customer SerDes issues across pre-silicon, bring-up, and production phases
- Drive PCIe compliance, Ethernet IEEE compliance, and interop testing, and develop automated test scripts and regression suites for link stability, retry behavior, and stress conditions
- Design, develop, and debug embedded firmware for high-speed SerDes systems spanning both electrical and optical domains, including configuration, monitoring, diagnostics, and adaptation hooks for electrical SerDes PHYs
- Validate and characterize AMD’s SerDes PHY functionality and performance – electrical and/or optical – against design targets, product requirements, datasheets, and industry standards such as PCIe, IEEE, and OIF
- Work closely with internal and external teams to troubleshoot issues, determine root cause, and feed lab learnings back to designers and architects for next-generation IP and design improvements
- Develop test automation with advanced scripting and programming skills to improve test coverage, data analysis efficiency, and demo/customer-support tooling
- PREFERRED EXPERIENCE: Knowledge of physical-layer specifications and industry standards such as PCIe, IEEE 802.3 Ethernet, and OIF
- Experience in producing quality firmware for mixed-signal systems
- Hands-on experience with full-stack lab instruments such as high-speed scopes, BERT, VNA, and other associated lab equipment
- Experience in SerDes electrical compliance for industry standards such as PCIe and Ethernet is preferred
- Experience in scripting test automation, demo GUIs, and customer-support scripts
- ACADEMIC CREDENTIALS: BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent preferred
- LOCATION: San Jose, California, USA
- This role is not eligible for visa sponsorship.
Qualifications
