ASIC Verification Engineer, Ring/Blink ASIC Team

Join the team that delivers highly differentiated silicon powering Blink and Ring battery-powered devices. Our verification team operates on state-of-the-art SoCs within a vertically integrated environment, contributing to early architectural and micro-architectural trade-offs that reduce time-to-revenue by compressing the DV cycle.

In this role you will use bit-accurate C reference models as golden baselines to verify image and video processing subsystems, build and maintain UVM-based testbench environments with automated stimulus generation and scoreboarding, and drive gate-level simulations to ensure timing-accurate, power-aware signoff. Our integrated verification and validation flow spans architectural modeling through post-silicon bring-up — giving engineers end-to-end visibility into the designs they verify.