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US, Oregon, Hillsboro; USA - OR - Hillsboro; US, Massachusetts, Beaver Brook; US, California, Folsom; US, California, Santa Clara; US, Texas, Austin; US, Arizona, Phoenix
Source: Intel careers · View original posting
From Intel's posting. “We” and “our” refer to the employer.
Intel's Central Engineering Group (CEG) focuses on enhancing engineering execution and expanding market opportunities through internal product development and external ASIC design services. Guided by a data-driven approach, CEG drives scalable, impactful solutions across Intel's engineering processes while maintaining a commitment to delivering high-quality results.
Join a team dedicated to revolutionizing engineering methodologies and supporting Intel's industry leadership.
Position Overview
As an IP Design Verification Engineer, you will play a crucial role in ensuring the functional accuracy and reliability of clock generator IPs, such as PLL and FLL, within Intel's innovative product development lifecycle. You will actively develop verification environments, implement tests, and debug pre-silicon issues to meet rigorous specification requirements.
Your contributions will directly impact the seamless integration of IPs into Intel's cutting-edge designs and ensure the highest standards of quality and performance.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
LAYIQ is an independent job-discovery service. This listing does not imply a partnership with or endorsement by the employer. Review the original posting for current details and availability.
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